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Characterisation of the electroless nickel deposit as a barrier layer/under bump metallurgy on IC metallisation
Rohan, James F.; O'Riordan, Gerard
Selective electroless nickel–phosphorus deposits on integrated circuit (IC) metallisation such as copper and aluminium were characterised using differential scanning calorimetry (DSC), X-ray diffraction (XRD), scanning electron microscopy (SEM) and energy dispersive X-ray (EDX) for elemental analysis. Annealing the Ni–P deposits in nitrogen atmospheres at temperatures compatible with organic dielectrics for IC components, such as polyimide, was performed to characterise the deposits. The crystallisation behaviour of the electroless nickel deposits with different concentrations of co-deposited phosphorus was examined.
Keyword(s): Electroless; IC metallisation; Barrier; Crystallisation; Integrated circuits; Elemental analysis; Annealing; Crystallization; Dielectric materials; Differential scanning calorimetry; Electroless plating; Energy dispersive spectroscopy; Nickel deposits; Phosphate deposits; Polyimides; Scanning electron microscopy; X ray diffraction
Publication Date:
Type: Journal article
Peer-Reviewed: Yes
Language(s): English
Institution: University College Cork
Funder(s): Enterprise Ireland
Citation(s): Rohan, J. F. and O’Riordan, G. (2003) 'Characterisation of the electroless nickel deposit as a barrier layer/under bump metallurgy on IC metallisation', Microelectronic Engineering, 65(1), pp. 77-85. doi: 10.1016/S0167-9317(02)00730-X
Publisher(s): Elsevier
File Format(s): application/pdf
Related Link(s):
First Indexed: 2019-03-14 06:31:42 Last Updated: 2019-03-14 06:31:42