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3D interconnection by FIB assisted Pt deposition and electroless nickel deposition on the sides and edges of an I-Seed
Razeeb, Kafil M.; Nagle, Lorraine C.; Barton, John; Tassie, Paul; O'Flynn, Brendan; Rohan, James F.; Ó Mathúna, S. Cian
This paper reports on the development of a 3D interconnection process leading to the successful assembly of a five-layer 3-D 1mm cube module. This proof of concept module demonstrates the capability for successful integration and interconnection of commercial off the shelf components to fabricate functional modules in 1mm cube dimensions. It also demonstrates that use of established volume scale technologies like Flip-chip, dicing and patterning techniques are viable for fabricating these 1mm modules. The demonstrator consists of LED's bonded to the six sides of the 1mm cube, interconnected and powered up. The work will particularly report on two different processes to fabricate the interconnection pattern using direct Focused Ion Beam (FIB) assisted Pt deposition and electroless metal deposition, which again patterned by FIB. Uniform thickness of the deposit and excellent coverage on all six sides is achieved by electroless nickel deposition. Voltage current characterisation of the deposited Pt shows a resistivity value of 1864 +/- 100 mu Omega cm, whereas electroless Ni film shows a resistivity of 25 mu Omega cm due to boron inclusion. 100 nm An layer is deposited by chemical displacement reaction to enhance the conductivity and solderability of the film.
Keyword(s): Nickel; Conductivity; Conductive films; Lead; Assembly; Bonding; Ion beams; Voltage; Boron; Gold; Assembling; Electroless deposition; Focused ion beam technology; Interconnections; 3D interconnection; FIB; I-Seed
Publication Date:
Type: Conference item
Peer-Reviewed: Yes
Language(s): English
Institution: University College Cork
Citation(s): Razeeb, K. M., Nagle, L., Barton, J., Tassie, P., Flynn, B. O., Rohan, J. and Ó Mathuna, C. (2006) '3D interconnection by FIB assisted Pt deposition and electroless nickel deposition on the sides and edges of an I-Seed'. 56th Electronic Components and Technology Conference 2006, San Diego, CA, USA, 30 May-2 June, pp. 1308-1311. doi: 10.1109/ECTC.2006.1645823
Publisher(s): Institute of Electrical and Electronics Engineers (IEEE)
File Format(s): application/pdf
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First Indexed: 2019-04-03 06:30:38 Last Updated: 2019-04-05 06:30:16