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Analytical Approach to Statistical Logic Cell Delay Analysis and its Extension to a Timing Graph
Mishagli, Dimitri; Blokhina, Elena; Brazil, Thomas J.; Hollands, Steve
The 2018 ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, 15-16 March 2018 In this paper we propose a new methodology to determine the delay of combinational circuits within the framework of statistical static timing analysis (SSTA). The methodology is based on exact analytical solutions for the probability density functions of logic gate delays. Assuming initial delays of the input arrival times and operation time of gates to be normally distributed, the non-Gaussian distribution of the resulting delay of a gate is obtained, as well as its first two moments. This allowed us to propose a novel closed-loop algorithm for the calculation of delay propagation in combinational circuits. Possible extensions and future steps are discussed. European Commission - European Regional Development Fund Science Foundation Ireland Synopsys, Ireland Author contacted to verify date as has not been updated in ACM DL yet - AL Check for citation info when published - HC
Keyword(s): Combinational circuits; Statistical static timing analysis; Digital integrated circuits; Gaussian distributions
Publication Date:
2019
Type: Other
Peer-Reviewed: Unknown
Language(s): English
Institution: University College Dublin
Publisher(s): ACM
First Indexed: 2019-05-11 06:30:55 Last Updated: 2019-05-11 06:30:55